ASIC FPGA Design Verification Engineer

Contract: 12 Months+

  • Lead FPGA partitioning, synthesis and simulation for embedded CPU and security sub-system hardware prototype.
  • Partition multi-FPGA design for efficient placement and use of available interconnect.
  • Develop and maintain scripts and utilities for configuration of RTL, FPGA synthesis and placement, and test infrastructure based on high level features and functions of IP configuration.
  • Maintain Verilog testbench and test infrastructure in Verilog, SystemVerilog, C/C++ as required.
  • Simulate and verify the FPGA DUT.
  • Update tests and test infrastructure as needed for compatibility of simulation and FPGA prototype software.
  • Develop and maintain scripts and utilities for packaging of synthesized bitfile(s) and associated software infrastructure for provision to software teams for development.
  • Examine FPGA synthesis and partitioning results. Compare against prior references and correct issues. Recommend opportunities for area, timing and partitioning improvement.
  • Modify or create technology specific substitutes for FPGA synthesis flow for common elements such as SRAM, clock-gaters, ASIC standard cells, etc.
  • Support design team in use of FPGA prototype for debug, silicon bring-up and diagnostics.
  • Mentoring junior team members, hands-on involvement in resolving technical issues.

Requirements:

  • At least 5-10 years of experience in the field of ASIC/FPGA digital design and verification.
  • Must have experience with Verilog, SystemVerilog and common programming and scripting languages (Make, TCL, Perl, Python, C, C++, etc).
  • Prior experience with FPGA partitioning and synthesis.
  • Must be familiar with ASIC design tools and flows - simulation, synthesis, ECOs, etc.
  • Prior experience with simulation, emulation and FPGA prototyping.
  • Prior experience with silicon bring-up and debug.
  • Must have strong technical and analytical background and problem-solving skills.
  • Security/cryptography experience is an asset.
  • Must be proactive and a self-starter.
  • Excellent communication and leadership skills.

Education:

  • Bachelor or Master’s degree in Electrical or Computer Engineering