ASIC/RTL Design Engineer

Duration: 12 Months

Payrange: $ 75- 85/HR

JOB DESCRIPTION:

The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and internal IPs. Successful candidates will be responsible for leading, and participating in, the design of leading edge SoCs in advanced digital CMOS processes. Our RTL Design Engineers are expected contribute to all aspects of SoC design including: Chip definition, Architecture development and modeling, Development of micro-architectural specifications, Conversion of micro-architectural specifications to logic implementation, Verification, emulation, debug, synthesis, and timing closure, Interfacing with physical execution, software, and silicon bring-up teams.

Must Have hard skills:

• Has to portray proper SOC Design characteristics – such as integrating all blocks to single chip.
• Debug experience.
• Testing
• Responsible for the design of the circuit

PREFERRED EXPERIENCE:

• SoC Design.
• Knowledge AND hand-on experience from industry ASIC design flow including RTL coding, IP Integration, debugging/verification, and supporting synthesis and timing closure.
• Working knowledge of ARM cores and other I/O standard interfaces.
• Roughly 10 years’ experience, but less is acceptable.
• Bachelor’s in electrical engineering or computer engineering is acceptable
• An ideal candidate would also exhibit: Strong communication and documentation skills, Good organizational, time management and multitasking skills, Strong initiative and discipline to follow-through, Technical leadership.